Changes between Initial Version and Version 1 of UMLPEN-QSR-2Q2010

Timestamp:

08/15/10 11:15:22 (14 years ago)

Author:

Yan Luo

Comment:

--

UMLPEN-QSR-2Q2010

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+[[PageOutline]]
+
+= UMLPEN Project Status Report = 
+
+Period: April 2010 - June 2010
+
+== I. Major accomplishments ==
+
+=== A. Milestones achieved ===
+We have worked with the UMass Lowell campus IT, our ISP (UITS from UMass) and BBN on the establishment and testing of an Internet2 L2 VLAN connection from our CANS lab (located in Ball Hall of UMass Lowell campus) to NOX at Boston. As of March 25, the ping test was successfully from Ball Hall to BBN's VLAN test node through NOX.
+
+We have implemented a clock synchronization scheme on the network processor based NIC. We tested the scheme through a packet forwarding experiment.
+
+We have enhanced virtual router templates and set up scripts.
+
+=== B. Deliverables made ===
+A live L2 VLAN connection from CANS lab at UMass Lowell to NOX at
+Boston.
+
+Source code for the clock synchronization on NIC.
+
+Enhanced virtual router templates and setup scripts.
+
+
+== II. Description of work performed during last quarter ==
+
+=== A. Activities and findings ===
+
+==== 1. Internet2 VLAN connectivity ====
+
+During this past quarter, we have been working with UMass Lowell IT
+network services staff led by Steve Dresche on establishing the VLAN
+connectivity from Internet2 POP at Boston to the Computer Architecture
+and Network Systems (CANS) Lab at UMass Lowell (Ball Hall 406). There
+is only one existing connection to the regular Internet due to
+historical reasons. Therefore, to have a dedicated new L2 connection
+to Internet2 is a major undertaking for the university and the PI. We
+had a series of meetings with the campus network services staff
+including Steve Drescher (Director of Network Services) and Marcie
+Byrd (network security specialist). UITS is eventually chosen as the
+service provider. (UITS is part of University of Massachusetts
+systemÕs network service provider, and the ISP of our current Internet
+connection.)
+
+The network connection layout of connecting the CANS lab at UMass
+Lowell to the Internet2 is shown in Figure 1 (below).
+
+[[Image(CANSLab-Internet2-VLAN.png)]]
+
+We coordinated with UMass Lowell network services, UITS, NOX, and BBN
+to conduct a VLAN test to verify the connectivity. After some
+debugging and tuning, we were able to successfully ping from the cisco
+switch at Ball Hall 4C IDF to the test node at BBN, on March 25, 2010.
+
+==== 2. Clock synchronization on network processor based NIC ====
+
+''Overview of the Design''
+
+We leverage the timestamp registers on the PNIC and periodic message
+exchange with the host to synchronize with the reference clock on the
+host. In such a way, the processing cores on the NIC can perform
+timing related tasks. The programmable cores on PNIC have times- tamp
+registers which are incremented every 16 cycles (about 11
+nanoseconds). The timestamp register is use- ful to track the time
+elapse between events. However, the PNIC lacks an onboard real-time
+clock. To address this issue, we rely on the system clock of the host
+to maintain clock synchronization, assuming the host runs a NTP-like
+protocol to keep itself synchronized with an atomic clock. The clock
+synchronization operation be- tween the PNIC and host is as
+follows. First, the host sends a special message with its current
+clock value to the PNIC through a basic message passing API. Then the
+PNIC recognizes this special "time"packet and extracts the clock
+time Th from the packet. Next, a packet processing core of PNIC writes
+Th to SRAM and reset the timestamp register . Finally, when the time
+value is needed, the processor reads value t1 from the timestamp
+register and calculates the current time T as T = Th+t1. The software
+architecture of the design is shown in Figure 2 (below).
+
+[[Image(ClockSynch.png)]]
+
+
+
+''The Usage''
+
+We have developed requires software to be run on both the network
+processor and the host cpu. We have developed macros in microcode on
+the network processor that allow access to the timestamp register and
+perform the necessary unit conversions. Through our APIs, the macros
+that we've developed can be integrated into any microcode project on
+the IXP2400 and 2800 network processors. On the host side, the job of
+initializing the card is performed by a userspace Linux application
+we've written. The network processor card we're using is the Netronome
+NFEi8000, and the code we use to communicate with the card depends on
+Netronome's API's. As long as a Netronome card is in use, our
+timestamp initialization program will open up a new messaging instance
+with the card and send the appropriate message to initialize the
+timestamp registers.
+ 
+Figure 2. Clock synchronization at NIC. 
+
+==== 3. Enhancement of PEN virtual router templates and set-up scripts ====
+
+The PEN project is comprised of a number of scripts designed to work
+in conjunction with ProtoGENI clearinghouse. These scripts are
+designed to handle calls to virtual machines of type pcPEN described
+in the Emulab database. We have enhanced the scripts for the new
+ProtoGENI component manager API version 2. The scripts are available
+in tarball format with detailed information regarding any
+modifications which may be required to implement a PEN deployment at a
+new site. Implementation of these scripts results in a physical host
+capable of providing resource sharing through virtual machines. The
+VMs provided at UMass Lowell provide support for the Netronome network
+interface card, which is another feature of the PEN project.
+
+==== Plan for Demonstration at GEC7 ====
+
+Our GEC7 demo is on the PEN integration and usage within ProtoGENI
+control framework. The main goal of our demo is to demonstrate the
+integration of Programmable Edge Node with ProtoGENI control
+framework, and the use case of the clock synchronization function
+implemented on the NIC of PEN.
+
+=== B. Project participants ===
+
+Yan Luo, PI [[BR]]
+Timothy Ficarra, student [[BR]]
+Eric Murray, student [[BR]]
+Craig Masley, student [[BR]]
+Sanping Li, student [[BR]]
+Julie Bissell, student [[BR]]
+Amon Faria, student [[BR]]
+Guofu Yuan, student
+
+=== C. Publications (individual and organizational) ===
+
+Yan Luo, Timothy Ficarra, Eric Murray and Chunhui Zhang, The Design,
+Performance Evaluation and Use Cases of a Virtualized Programmable
+Edge Node for Network Innovations, Accepted by International Journal
+of Communication Networks and Distributed Systems, to appear 2010.
+
+=== D. Outreach activities ===
+
+=== E. Collaborations ===
+
+We are working with PrimoGENI team at Florida International University
+on high performance conduit of simulation and emulation.  We are also
+planning an end-to-end VLAN test between UML and FIU over the
+Internet2 or NLR.
+
+=== F. Other Contributions ===
+
+The PI and five students attended GEC7 and gave a demo of the
+integration of UMLPEN with ProtoGENI control framework and the clock
+synchronization scheme implemented on NIC.  Julie Bissell, Amon Faria,
+Guofu Yuan and Eric Murray attended the GEC7 (including the tutorial
+sessions and the main conference), with the support from the REU
+supplemental grant.
+
+