Changes between Initial Version and Version 1 of UMLPEN-QSR-1Q2010


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Timestamp:
05/03/10 14:22:06 (14 years ago)
Author:
Vic Thomas
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  • UMLPEN-QSR-1Q2010

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     1[[PageOutline]]
     2
     3= UMLPEN Project Status Report =
     4
     5Period: Jan 2010 - Mar 2010
     6
     7== I. Major accomplishments ==
     8
     9=== A. Milestones achieved ===
     10We have worked with the UMass Lowell campus IT, our ISP (UITS from UMass) and BBN on the establishment and testing of an Internet2 L2 VLAN connection from our CANS lab (located in Ball Hall of UMass Lowell campus) to NOX at Boston. As of March 25, the ping test was successfully from Ball Hall to BBNÕs VLAN test node through NOX.
     11
     12We have implemented a clock synchronization scheme on the network processor based NIC. We tested the scheme through a packet forwarding experiment.
     13
     14We have enhanced virtual router templates and set up scripts.
     15
     16=== B. Deliverables made ===
     17A live L2 VLAN connection from CANS lab at UMass Lowell to NOX at
     18Boston.
     19
     20Source code for the clock synchronization on NIC.
     21
     22Enhanced virtual router templates and setup scripts.
     23
     24
     25== II. Description of work performed during last quarter ==
     26
     27=== A. Activities and findings ===
     28
     29==== 1. Internet2 VLAN connectivity ====
     30
     31During this past quarter, we have been working with UMass Lowell IT
     32network services staff led by Steve Dresche on establishing the VLAN
     33connectivity from Internet2 POP at Boston to the Computer Architecture
     34and Network Systems (CANS) Lab at UMass Lowell (Ball Hall 406). There
     35is only one existing connection to the regular Internet due to
     36historical reasons. Therefore, to have a dedicated new L2 connection
     37to Internet2 is a major undertaking for the university and the PI. We
     38had a series of meetings with the campus network services staff
     39including Steve Drescher (Director of Network Services) and Marcie
     40Byrd (network security specialist). UITS is eventually chosen as the
     41service provider. (UITS is part of University of Massachusetts
     42systemÕs network service provider, and the ISP of our current Internet
     43connection.)
     44
     45The network connection layout of connecting the CANS lab at UMass
     46Lowell to the Internet2 is shown in Figure 1 (below).
     47
     48We coordinated with UMass Lowell network services, UITS, NOX, and BBN
     49to conduct a VLAN test to verify the connectivity. After some
     50debugging and tuning, we were able to successfully ping from the cisco
     51switch at Ball Hall 4C IDF to the test node at BBN, on March 25, 2010.
     52
     53==== 2. Clock synchronization on network processor based NIC ====
     54
     55''Overview of the Design''
     56
     57We leverage the timestamp registers on the PNIC and periodic message
     58exchange with the host to synchronize with the reference clock on the
     59host. In such a way, the processing cores on the NIC can perform
     60timing related tasks. The programmable cores on PNIC have times- tamp
     61registers which are incremented every 16 cycles (about 11
     62nanoseconds). The timestamp register is use- ful to track the time
     63elapse between events. However, the PNIC lacks an onboard real-time
     64clock. To address this issue, we rely on the system clock of the host
     65to maintain clock synchronization, assuming the host runs a NTP-like
     66protocol to keep itself synchronized with an atomic clock. The clock
     67synchronization operation be- tween the PNIC and host is as
     68follows. First, the host sends a special message with its current
     69clock value to the PNIC through a basic message passing API. Then the
     70PNIC recognizes this special "time"packet and extracts the clock
     71time Th from the packet. Next, a packet processing core of PNIC writes
     72Th to SRAM and reset the timestamp register . Finally, when the time
     73value is needed, the processor reads value t1 from the timestamp
     74register and calculates the current time T as T = Th+t1. The software
     75architecture of the design is shown in Figure 2.
     76
     77''The Usage''
     78
     79We have developed requires software to be run on both the network
     80processor and the host cpu. We have developed macros in microcode on
     81the network processor that allow access to the timestamp register and
     82perform the necessary unit conversions. Through our APIs, the macros
     83that we've developed can be integrated into any microcode project on
     84the IXP2400 and 2800 network processors. On the host side, the job of
     85initializing the card is performed by a userspace Linux application
     86we've written. The network processor card we're using is the Netronome
     87NFEi8000, and the code we use to communicate with the card depends on
     88Netronome's API's. As long as a Netronome card is in use, our
     89timestamp initialization program will open up a new messaging instance
     90with the card and send the appropriate message to initialize the
     91timestamp registers.
     92 
     93Figure 2. Clock synchronization at NIC.
     94
     95==== 3. Enhancement of PEN virtual router templates and set-up scripts ====
     96
     97The PEN project is comprised of a number of scripts designed to work
     98in conjunction with ProtoGENI clearinghouse. These scripts are
     99designed to handle calls to virtual machines of type pcPEN described
     100in the Emulab database. We have enhanced the scripts for the new
     101ProtoGENI component manager API version 2. The scripts are available
     102in tarball format with detailed information regarding any
     103modifications which may be required to implement a PEN deployment at a
     104new site. Implementation of these scripts results in a physical host
     105capable of providing resource sharing through virtual machines. The
     106VMs provided at UMass Lowell provide support for the Netronome network
     107interface card, which is another feature of the PEN project.
     108
     109==== Plan for Demonstration at GEC7 ====
     110
     111Our GEC7 demo is on the PEN integration and usage within ProtoGENI
     112control framework. The main goal of our demo is to demonstrate the
     113integration of Programmable Edge Node with ProtoGENI control
     114framework, and the use case of the clock synchronization function
     115implemented on the NIC of PEN.
     116
     117=== B. Project participants ===
     118
     119Yan Luo, PI [[BR]]
     120Timothy Ficarra, student [[BR]]
     121Eric Murray, student [[BR]]
     122Craig Masley, student [[BR]]
     123Sanping Li, student [[BR]]
     124Julie Bissell, student [[BR]]
     125Amon Faria, student [[BR]]
     126Guofu Yuan, student
     127
     128=== C. Publications (individual and organizational) ===
     129
     130Yan Luo, Timothy Ficarra, Eric Murray and Chunhui Zhang, The Design,
     131Performance Evaluation and Use Cases of a Virtualized Programmable
     132Edge Node for Network Innovations, Accepted by International Journal
     133of Communication Networks and Distributed Systems, to appear 2010.
     134
     135=== D. Outreach activities ===
     136
     137=== E. Collaborations ===
     138
     139We are working with PrimoGENI team at Florida International University
     140on high performance conduit of simulation and emulation.  We are also
     141planning an end-to-end VLAN test between UML and FIU over the
     142Internet2 or NLR.
     143
     144=== F. Other Contributions ===
     145
     146The PI and five students attended GEC7 and gave a demo of the
     147integration of UMLPEN with ProtoGENI control framework and the clock
     148synchronization scheme implemented on NIC.  Julie Bissell, Amon Faria,
     149Guofu Yuan and Eric Murray attended the GEC7 (including the tutorial
     150sessions and the main conference), with the support from the REU
     151supplemental grant.
     152
     153