NetFPGA

Nick McKeown

We are building NetFPGA. Actually, we built the first version under an
NSF-EIA program for use in teaching. It's being used quite a bit by
us, and we are just about to launch support for other schools. NetFPGA
2.1 (available in Spring 2007) will consist of a design kit:

* A PCI card that fits into a regular PC with 4 x 1GE ports and a
honking great FPGA on it,

* Design libraries in Verilog for common blocks (queues, schedulers,
IP lookup, etc.). We will also supply standard designs, such as 4-port
learning GE switch, 4-port GE router.

* Courseware for people offering classes: Assignments and starter-code
(we have a class called "Build an Internet Router" that uses this
starter-code already.

* Researchware for people doing research: Examples of packet
generators, switches, monitoring, new algorithms and packet
processing.

The web site is: http://yuba.stanford.edu/netfpga

How it helps GENI:

While almost all graduating EE students are familiar with Verilog
(just another parallel language :-) ), there is a small overlap
between networking researchers and people who know Verilog. Our goal
is to change that by making available a teaching tool for networking
hardware that universities can use in ugrad and MS programs (as we are
doing at Stanford), and for researchers who want to build their own
modified switches/routers.

By mid-2007 it should be possible to build the design kit above and
for researchers to get experience programming their own switches and
routers that process packets at line-rate.